The present invention relates to a semiconductor device technique, and particularly to a technique effective if applied to a semiconductor device having a power supply circuit.
A DC-DC converter widely used as one example of a power supply circuit has a configuration wherein a high-side power MOS•FET (Metal Oxide Semiconductor Field Effect Transistor) and a low-side power MOS•FET are connected in series. The high-side power MOS•FET has a switch function for control of the DC-DC converter, and the low-side power MOS•FET has a switch function for synchronous rectification. By alternately turning on/off these two power MOS•FETs while synchronization is being achieved therebetween, the conversion of a power supply voltage is carried out.
Such a DC-DC converter has been described in, for example, Japanese Unexamined Patent Publication No. 2003-528449 (patent document 1), which discloses a configuration wherein a high-side power MOS•FET, a low-side power MOS•FET, a driver circuit that drives these power MOS•FETs, and an input capacitor are accommodated within the same package.
A package configuration wherein a high-side power MOS•FET constituting a DC-DC converter is constituted of a horizontal power MOS•FET, a low-side power MOS•FET constituting the DC-DC converter is configured of a vertical power MOS•FET, and these power MOS•FETs are mounted over a common frame, has been disclosed in, for example, Japanese Unexamined Patent Publication No. 2002-217416 (patent document 2).